WOLFRAM SYSTEM MODELER

AssignClockVectorized

Example of a AssignClockVectorized block for Real signals

Diagram

Wolfram Language

In[1]:=
SystemModel["Modelica.Clocked.Examples.Elementary.RealSignals.AssignClockVectorized"]
Out[1]:=

Information

This information is part of the Modelica Standard Library maintained by the Modelica Association.

Example used to generate a figure for the documentation of block Modelica.Clocked.RealSignals.Sampler.AssignClockVectorized.

Components (8)

periodicClock

Type: PeriodicExactClock

Description: Generate a periodic clock signal with a period defined by an Integer number with resolution
unitDelay1

Type: UnitDelay

Description: Delay the clocked input signal for one sample period
add

Type: Add

Description: Output the sum of the two inputs
const

Type: Constant

Description: Generate constant signal of type Real
assignClock1

Type: AssignClockVectorized

Description: Assign a clock to a clocked Real signal vector
add1

Type: Add

Description: Output the sum of the two inputs
const1

Type: Constant

Description: Generate constant signal of type Real
unitDelay2

Type: UnitDelay

Description: Delay the clocked input signal for one sample period