3.10.2 Simulator-Specific Remarks on ReadNetlist

The command ReadNetlist translates netlists from several external simulators to the Analog Insydes netlist format. The following section describes the different features supported by ReadNetlist for each simulator.

AnalogInsydes

ReadNetlist["netfile", Simulator -> "AnalogInsydes"] is basically only a wrapper function for the Mathematica command Get. Additionally, ReadNetlist checks if the netfile loaded contains a Circuit object and appends Simulator -> "AnalogInsydes" to the GlobalParameters field.

PSpice

ReadNetlist["netfile", Simulator -> "PSpice"] supports the following devices:

PSpice reference designators supported by ReadNetlist.

All model calls have functions as references for Model, Selector, and Parameters were applicable:

rd, -> , ,

Model -> Model[type, model, rd],

Selector -> Selector[type, model, rd],

Parameters -> Parameters[type, model, rd],

where type is one of "BJT", "CAP", "Diode", "IND", "JFET", "MOSFET", or "RES". The value model is the model name, rd the reference designator of the device.

Linear resistors (R), capacitors (C), and inductors (L) are converted to their generic counterpart in Analog Insydes. Model calls are generated if temperature dependencies are given or a model is defined.

Linear controlled sources (E, F, G, H) are converted to their generic counterpart in Analog Insydes. In case of current controlled sources (F, H) additional nodes are introduced. In case of nonlinear voltage controlled sources (E, G) a behavioral model is generated and appended to the netlist. Supported types are POLY, VALUE, and TABLE.

Independent sources (I, V) of type EXP, PULSE, PWL, SFFM, and SIN are supported (see Chapter 4.1).

Parameterized subcircuits without optional nodes are also supported and may contain local model cards.

The following cards are supported:

PSpice cards supported by ReadNetlist.

The following cards are ignored:

PSpice cards ignored by ReadNetlist.

Note that all temperatures like TEMP are converted from to .

ReadNetlist["netfile", "outfile", Simulator -> "PSpice"] additionally scans the operating-point information section in the output file outfile. Afterwards the circuit is flattened via an internal call to ExpandSubcircuits and the small-signal parameters are appended to the corresponding model instance. The parameter names are postfixed with "$ac" to avoid ambiguities.

Eldo

ReadNetlist["netfile", Simulator -> "Eldo"] supports the following devices:

Eldo reference designators supported by ReadNetlist.

All model calls have functions as references for Model, Selector, and Parameters were applicable:

rd, -> , ,

Model -> Model[type, model, rd],

Selector -> Selector[type, model, rd],

Parameters -> Parameters[type, model, rd],

where type is one of "BJT", "CAP", "Diode", "IND", "JFET", "MOSFET", or "RES". The value model is the model name, rd the reference designator of the device.

Linear resistors (R), capacitors (C), and inductors (L) are converted to their generic counterpart in Analog Insydes. Model calls are generated if temperature dependencies are given or a model is defined.

Linear controlled sources (E, F, G, H) are converted to their generic counterpart in Analog Insydes. In case of current controlled sources (F, H) additional nodes are introduced. In case of nonlinear voltage controlled sources (E, G) a behavioral model is generated and appended to the netlist. Supported types are POLY, VALUE, and TABLE.

Independent sources (I, V) of type EXP, PULSE, PWL, SFFM, and SIN are supported (see Chapter 4.1).

Parameterized subcircuits are also supported and may contain local model cards and local subcircuit definitions.

For calls to HDLA models (Y), ReadNetlist reads the file "hdlaInfo" and scans the section [HdlaPins] to set up the correct node to port mapping:

rd, -> , ,

Model -> Model[entity, architecture, rd],

Selector -> architecture,

with the HDLA entity name entity and the HDLA architecture name architecture. If the file cannot be found a generic port list is generated:

rd, -> 1, -> 2,

Model -> Model[entity, architecture, rd],

Selector -> architecture,

The environment variables HDLALIBPATH and HDLAWORKPATH are taken into account while searching for the file "hdlaInfo".

The following cards are supported:

Eldo cards supported by ReadNetlist.

The following cards are ignored:

Eldo cards ignored by ReadNetlist.

Note that all temperatures like TEMP are converted from  to .

ReadNetlist["netfile", "outfile", Simulator -> "Eldo"] additionally scans the operating-point information section in the output file outfile. Afterwards the circuit is flattened via an internal call to ExpandSubcircuits and the small-signal parameters are appended to the corresponding model instance. The parameter names are postfixed with "$ac" to avoid ambiguities.

Saber

ReadNetlist["netfile", Simulator -> "Saber"] reads in Saber netlists. Due to the fact that all elements in Saber MAST are calls to MAST templates, ReadNetlist replaces some template calls with generic Analog Insydes elements:

MAST templates replaced with generic Analog Insydes elements.

All other elements are converted to

name, -> , ,

Model -> Model[model, model, name],

Selector -> Selector[model, model, name],

Parameters -> Parameters[model, model, name],

where name is the name of the element and model is the template name.