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2.3.2 Defining Subcircuits and Device Models
The Model Object
Let's start to work with hierarchically structured netlists by learning how to define subcircuits using the Analog Insydes objects Model or Subcircuit. This section describes how to write netlist-based models or subcircuits. Section 2.6.2 shows how to write equation-based models.
Model and Subcircuit are semantically equivalent symbols. In fact, Subcircuit is just an alias name for Model. You may want to use both names in a Circuit if you wish to give visual cues as to which subcircuits represent device models by using the Model directive for these and the Subcircuit object for all other subcircuits.
The Model object takes several arguments which must all be written in Mathematica's option syntax keyword -> value. Four of the arguments must always be present whereas the remaining ones are optional or have default values. Below, the optional arguments are printed in slanted typewriter font. For now, we will restrict ourselves to the discussion of the required arguments. The optional ones will be introduced later in a step-by-step fashion, as this will help you to better understand why and when they are needed.
Model[
Name -> subcircuit class name,
Selector -> selector,
Scope -> scope,
Ports ->  port nodes ,
Parameters ->  parameters ,
Defaults ->  defaults ,
Translation ->  parameter translation rules ,
Definition -> Netlist[subcircuit netlist]
]
The value of the Name argument must be a symbol which identifies an entire group, or class, of different subcircuit implementations of a non-primitive object, such as a transistor. The value of the Selector argument, which must also be a symbol, then selects one particular member from this class. The Ports argument defines the port nodes of a subcircuit structure. Its value must be a list of the identifiers of the subcircuit nodes which serve as external connection points.
Finally, the netlist of the subcircuit must be specified by means of the Definition argument. There is no built-in limit for the nesting depth of subcircuits, so the netlist may itself contain references to other Model definitions. However, you may only reference but not define subcircuits within subcircuits.
Small-Signal Transistor Models
To fully understand this abstract description of the Model function, let's examine a practical example. Assume that we want to calculate the AC voltage transfer function of the common-emitter amplifier from Section 2.3.1 (see Figure 3.1) and want to replace the transistor by either one of the two small-signal equivalent circuits shown in Figure 3.2.
Figure 3.2: Different transistor small-signal models: simple (left), dynamic (right)
Both circuits have in common that they represent the same object, namely an NPN transistor. Thus, they are two members of a subcircuit class we shall name NPNTransistor:
Name -> NPNTransistor
Within this class, each member must have a unique selector by which it can be identified. We will denote the simple small-signal model on the left-hand side of Figure 3.2 by
Selector -> ACsimple
and the one on the right-hand side by
Selector -> ACdynamic
From now on we will adopt the notation name/selector for denoting a subcircuit definition. For instance, we will refer to the model defined with Name -> NPNTransistor and Selector -> ACsimple as NPNTransistor/ACsimple. Both subcircuits contain four nodes: B, C, E, and X, where B, C, and E represent the transistor's base, collector, and emitter terminal respectively. The node X is an internal subcircuit node which is needed for properly connecting the controlling branch of the current-controlled current source in series with the base resistor RB (see also Section 2.2.2). Therefore, we declare only B, C, and E as port nodes of the subcircuits in order to make X invisible from the outside:
Ports -> {"B", "C", "E"}
Note that we use strings to denote the port nodes instead of symbols. Although this requires some more typing this is the recommended way for specifying nodes: If we would have used symbols in the above example, the symbol for the emitter node E could have been mixed up with the Mathematica symbol E which denotes the exponential constant  .
Connections to subcircuits can only be made through designated port nodes. Any attempt to interface directly with an internal node will cause the generation of an error message when the netlist hierarchy is flattened. However, there is one exception: since the ground node (0) is considered to be global, elements in subcircuit definitions may be connected directly with global ground without the need to specify 0 as a port node. In fact, 0 cannot be used as port node identifier in Analog Insydes. Finally, all which remains to do is to write the netlists of the two subcircuits and set up the Model definitions as follows:
Model[
Name -> NPNTransistor,
Selector -> ACsimple,
Ports -> {"B", "C", "E"},
Definition ->
Netlist[
{RB, {"X", "E"}, RB},
{CC, {"B", "X", "C", "E"}, beta}
]
]
Model[
Name -> NPNTransistor,
Selector -> ACdynamic,
Ports -> {"B", "C", "E"},
Definition ->
Netlist[
{RB, {"X", "E"}, RB},
{CM, {"B", "C"}, CM},
{CC, {"B", "X", "C", "E"}, beta},
{RO, {"C", "E"}, RO}
]
]
In this example, we used node names for all subcircuit nodes given by strings ("B", "C", "E", "X") but we could have used positive integers just as well. However, using symbolic names is usually preferable. The reason is that during subcircuit expansion all internal nodes of subcircuit objects will be instantiated and labeled with unique identifiers such as X$Q1, which are automatically generated from the node names and the reference designator of the subcircuit instance. If an internal node identifier is an integer, e.g. 2, the generated instance identifier 2$Q1 could be confused easily with the product 2*$Q1.
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