WOLFRAM SYSTEM MODELER

HalfAdder

Adding circuit for binary numbers without input carry bit

Diagram

Wolfram Language

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SystemModel["Modelica.Electrical.Digital.Examples.HalfAdder"]
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Information

This information is part of the Modelica Standard Library maintained by the Modelica Association.

This example demonstrates an adding circuit for binary numbers, which internally realizes the interconnection to And and to Xor in the final sum.



1 + 0 = 1
0 + 1 = 1
1 + 1 = 10
0 + 0 = 0

a + b = s
(The carry of this adding is c.)

and

a * b = s
(It is an interconnection to And.)

a * b + a * b = a Xor b = c
(It is an interconnection to Xor.)
a     b     c      s     t

1     0     1      0     1
0     1     1      0     2
1     1     0      1     3
0     0     0      0     4

t is the pick-up instant of the next bit(s) in the simulation. The simulation stop time should be 5 seconds.

Components (5)

a

Type: Table

Description: Digital Tabular Source

b

Type: Table

Description: Digital Tabular Source

Adder

Type: HalfAdder

Description: Half adder

s

Type: LogicToReal

Description: Logic to Real converter

c

Type: LogicToReal

Description: Logic to Real converter