WOLFRAM SYSTEM MODELER

IntegerOutput

'output Integer' as connector

Wolfram Language

In[1]:=
SystemModel["Modelica.Blocks.Interfaces.IntegerOutput"]
Out[1]:=

Information

This information is part of the Modelica Standard Library maintained by the Modelica Association.

Connector with one output signal of type Integer.

Used in Components (26)

IntegerValue

Modelica.Blocks.Interaction.Show

Show Integer value from numberPort or from number input field in diagram layer dynamically

IntegerSO

Modelica.Blocks.Interfaces

Single Integer Output continuous control block

IntegerMO

Modelica.Blocks.Interfaces

Multiple Integer Output continuous control block

PartialIntegerSISO

Modelica.Blocks.Interfaces

Partial block with a IntegerInput and an IntegerOutput signal

PartialIntegerMISO

Modelica.Blocks.Interfaces

Partial block with an IntegerVectorInput and an IntegerOutput signal

RealToInteger

Modelica.Blocks.Math

Convert Real to Integer signal

BooleanToInteger

Modelica.Blocks.Math

Convert Boolean to Integer signal

MultiSwitch

Modelica.Blocks.MathInteger

Set Integer expression that is associated with the first active input signal

TriggeredAdd

Modelica.Blocks.MathInteger

Add input to previous value of output, if rising edge of trigger port

IntegerReplicator

Modelica.Blocks.Routing

Integer signal replicator

IntegerPassThrough

Modelica.Blocks.Routing

Pass a Integer signal through without modification

IntegerExpression

Modelica.Blocks.Sources

Set output signal to a time varying Integer expression

PartialRotationalClock

Modelica.Clocked.ClockSignals.Clocks.Rotational

Base class for event clocks that generate a clock tick each time an observed input angle changes

SampleClocked

Modelica.Clocked.IntegerSignals.Sampler

Sample the continuous-time, Integer input signal and provide it as clocked output signal. The clock is provided as input signal

SampleVectorizedAndClocked

Modelica.Clocked.IntegerSignals.Sampler

Sample the continuous-time, Integer input signal vector and provide it as clocked output signal vector. The clock is provided as input signal

SubSample

Modelica.Clocked.IntegerSignals.Sampler

Sub-sample the clocked Integer input signal and provide it as clocked output signal

SuperSample

Modelica.Clocked.IntegerSignals.Sampler

Super-sample the clocked Integer input signal and provide it as clocked output signal

ShiftSample

Modelica.Clocked.IntegerSignals.Sampler

Shift the clocked Integer input signal by a fraction of the last interval and and provide it as clocked output signal

BackSample

Modelica.Clocked.IntegerSignals.Sampler

Shift clock of Integer input signal backwards in time (and access the most recent value of the input at this new clock)

AssignClock

Modelica.Clocked.IntegerSignals.Sampler

Assign a clock to a clocked Integer signal

AssignClockVectorized

Modelica.Clocked.IntegerSignals.Sampler

Assign a clock to a clocked Integer signal vector

UpSample

Modelica.Clocked.IntegerSignals.Sampler.Utilities

Upsample the clocked Integer input signal and provide it as clocked output signal

PartialSISOSampler

Modelica.Clocked.IntegerSignals.Interfaces

Basic block used for sampling of Integer signals

PartialSISOHold

Modelica.Clocked.IntegerSignals.Interfaces

Basic block used for zero order hold of Integer signals

PartialClockedSISO

Modelica.Clocked.IntegerSignals.Interfaces

Block with clocked single input and clocked single output Integer signals

PartialClockedSO

Modelica.Clocked.IntegerSignals.Interfaces

Block with clocked single output Integer signal