WOLFRAM SYSTEM MODELER
LogicalLibrary of components with Boolean input and output signals |
Logical 'and': y = u1 and u2 |
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Logical 'or': y = u1 or u2 |
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Logical 'xor': y = u1 xor u2 |
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Logical 'nor': y = not (u1 or u2) |
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Logical 'nand': y = not (u1 and u2) |
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Logical 'not': y = not u |
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Breaks algebraic loops by an infinitesimal small time delay (y = pre(u): event iteration continues until u = pre(u)) |
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Output y is true, if the input u has a rising edge (y = edge(u)) |
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Output y is true, if the input u has a falling edge (y = edge(not u)) |
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Output y is true, if the input u has a rising or falling edge (y = change(u)) |
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Output y is true, if input u is greater than threshold |
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Output y is true, if input u is greater or equal than threshold |
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Output y is true, if input u is less than threshold |
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Output y is true, if input u is less or equal than threshold |
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Output y is true, if input u1 is greater than input u2 |
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Output y is true, if input u1 is greater or equal than input u2 |
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Output y is true, if input u1 is less than input u2 |
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Output y is true, if input u1 is less or equal than input u2 |
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Trigger zero crossing of input u |
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Logical Switch |
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Switch between two Real signals |
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Transform Real to Boolean signal with Hysteresis |
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On-off controller |
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Triggered trapezoid generator |
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Timer measuring the time from the time instant where the Boolean input became true |
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Delay boolean signal |
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A basic RS Flip Flop |
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Terminate simulation if condition is fulfilled |
This information is part of the Modelica Standard Library maintained by the Modelica Association.
This package provides blocks with Boolean input and output signals to describe logical networks. A typical example for a logical network built with package Logical is shown in the next figure:
The actual value of Boolean input and/or output signals is displayed in the respective block icon as "circle", where "white" color means value false and "green" color means value true. These values are visualized in a diagram animation.
SystemModel["Modelica.Blocks.Logical"]