WOLFRAM SYSTEM MODELER
NXFERGATETransfergate with enable active high |
SystemModel["Modelica.Electrical.Digital.Tristates.NXFERGATE"]
This information is part of the Modelica Standard Library maintained by the Modelica Association.
Description in VHDL is given by http://www.cs.sfu.ca/~ggbaker/reference/std_logic/src/std_logic_entities.vhd
Truth Table
DataIn | Enable | DataOut |
* | U | U |
* | X | UX |
* | 0 | Z |
* | 1 | DataIn |
* | Z | UX |
* | W | UX |
* | L | Z |
* | H | DataIn |
* | - | UX |
UX: if dataIn == U then U else X
enable |
Type: DigitalInput Description: Input DigitalSignal as connector |
|
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x |
Type: DigitalInput Description: Input DigitalSignal as connector |
|
y |
Type: DigitalOutput Description: Output DigitalSignal as connector |
|
yy |
Type: DigitalOutput Description: Output DigitalSignal as connector |
inertialDelaySensitive |
Type: InertialDelaySensitive Description: Provide the input as output if it holds its value for a specific amount of time |
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Modelica.Electrical.Digital.Examples Functionality test of NXFERGATE |