WOLFRAM SYSTEMMODELER

DigitalInput

Input DigitalSignal as connector

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SystemModel["Modelica.Electrical.Digital.Interfaces.DigitalInput"]
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Information

This information is part of the Modelica Standard Library maintained by the Modelica Association.

DigitalInput is the digital input connector definition. DigitalInput is of type Logic. It can have the logic values (U, X, 0, 1, ...) which are internally coded by integer values by using the enumeration (c.f. the definition of type Logic).

Used in Components (65)

AD_Converter

Simple n-bit analog to digital converter

DA_Converter

Simple digital to analog converter

MUX4

4 to 1 Bit Multiplexer

RS

Unclocked RS FlipFlop

RSFF

Unclocked RS FlipFlop

DFF

D FlipFlop

JKFF

JK FlipFlop

HalfAdder

Half adder

FullAdder

Adding circuit for binary numbers with input carry bit

Adder

Generic N Bit Adder

Counter3

3 Bit Counter

Counter

Generic N Bit Counter

SISO

Single input, single output

MISO

Multiple input - single output

MIMO

Multiple input - multiple output

TransportDelay

Transport delay with initial parameter

InertialDelay

Inertial delay with initial parameter

InertialDelaySensitive

Provide the input as output if it holds its value for a specific amount of time

InertialDelaySensitiveVector

Delay of a vector of digital signals

Not

Not logic component without delay

And

And logic component with multiple input and one output

Nand

Nand logic component with multiple input and one output

Or

Or logic component with multiple input and one output

Nor

Nor logic component with multiple input and one output

Xor

Xor logic component with multiple input and one output

Xnor

Xnor logic component with multiple input and one output

InvGate

InvGate with 1 input value, composed by Not and sensitive inertial delay

AndGate

AndGate with multiple input

NandGate

NandGate with multiple input

OrGate

OrGate with multiple input

NorGate

NorGate with multiple input

XorGate

XorGate with multiple input

XnorGate

XnorGate with multiple input

BufGate

BufGate with 1 input value, composed by Not and sensitive inertial delay

LogicToX01

Conversion to X01

LogicToX01Z

Conversion to X01Z

LogicToUX01

Conversion to UX01

LogicToBoolean

Logic to Boolean converter

LogicToReal

Logic to Real converter

LogicToXO1

This model will be removed in future Modelica versions, use 'LogicToX01' instead!

LogicToXO1Z

This model will be removed in future Modelica versions, use 'LogicToX01Z' instead!

DFFR

Edge triggered register bank with reset

DFFREG

Edge triggered register bank with high active reset

DFFREGL

Edge triggered register bank with low active reset

DFFSR

Edge triggered register bank with set and reset

DFFREGSRH

Edge triggered register bank with high active set and reset

DFFREGSRL

Edge triggered register bank with low active set and reset

DLATR

Level sensitive register bank with reset

DLATREG

Level sensitive register bank with reset active high

DLATREGL

Level sensitive register bank with reset active low

DLATSR

Level sensitive register bank with set and reset

DLATREGSRH

Level sensitive register bank with set and reset, active high

DLATREGSRL

Level sensitive register bank with set and reset, active low

NXFERGATE

Transfergate with enable active high

NRXFERGATE

Transfergate with enable active high. Output strength reduced.

PXFERGATE

Transfergate with enable active low

PRXFERGATE

Transfergate with enable active low. Output strength reduced.

BUF3S

Tristate buffer with enable active high

BUF3SL

Tristate buffer with enable active low

INV3S

Tristate Inverter with enable active high

INV3SL

Tristate inverter with enable active low

WiredX

Wired node with multiple input and one output

DLATRAM

Level sensitive Random Access Memory

DLATROM

Level sensitive Read Only Memory

MUX2x1

A two inputs MULTIPLEXER for multiple value logic (2 data inputs, 1 select input, 1 output)