WOLFRAM SYSTEMMODELER

DigitalOutput

Output DigitalSignal as connector

Wolfram Language

In[1]:=
SystemModel["Modelica.Electrical.Digital.Interfaces.DigitalOutput"]
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Information

This information is part of the Modelica Standard Library maintained by the Modelica Association.

DigitalOutput is the digital output connector definition. DigitalOutput is of type Logic. It can have the logic values (U, X, 0, 1, ...) which are internally coded by integer values by using the enumeration (c.f. the definition of type Logic). The arrow shape symbolizes the signal flow direction.

Enumeration Literals (9)

'U'

U Uninitialized

'X'

X Forcing Unknown

'0'

0 Forcing 0

'1'

1 Forcing 1

'Z'

Z High Impedance

'W'

W Weak Unknown

'L'

L Weak 0

'H'

H Weak 1

'-'

- Do not care

Used in Components (45)

AD_Converter

Modelica.Electrical.Analog.Ideal

Simple n-bit analog to digital converter

MUX4

Modelica.Electrical.Digital.Examples.Utilities

4 to 1 Bit Multiplexer

RS

Modelica.Electrical.Digital.Examples.Utilities

Unclocked RS FlipFlop

RSFF

Modelica.Electrical.Digital.Examples.Utilities

Unclocked RS FlipFlop

DFF

Modelica.Electrical.Digital.Examples.Utilities

D FlipFlop

JKFF

Modelica.Electrical.Digital.Examples.Utilities

JK FlipFlop

HalfAdder

Modelica.Electrical.Digital.Examples.Utilities

Half adder

FullAdder

Modelica.Electrical.Digital.Examples.Utilities

Adding circuit for binary numbers with input carry bit

Adder

Modelica.Electrical.Digital.Examples.Utilities

Generic N Bit Adder

Counter3

Modelica.Electrical.Digital.Examples.Utilities

3 Bit Counter

Counter

Modelica.Electrical.Digital.Examples.Utilities

Generic N Bit Counter

SISO

Modelica.Electrical.Digital.Interfaces

Single input, single output

MISO

Modelica.Electrical.Digital.Interfaces

Multiple input - single output

MIMO

Modelica.Electrical.Digital.Interfaces

Multiple input - multiple output

MemoryBase

Modelica.Electrical.Digital.Interfaces

Base model for memory elements

InertialDelaySensitiveVector

Modelica.Electrical.Digital.Delay

Delay of a vector of digital signals

Set

Modelica.Electrical.Digital.Sources

Digital Set Source

Step

Modelica.Electrical.Digital.Sources

Digital Step Source

Table

Modelica.Electrical.Digital.Sources

Digital Tabular Source

Pulse

Modelica.Electrical.Digital.Sources

Digital Pulse Source

Clock

Modelica.Electrical.Digital.Sources

Digital Clock Source

LogicToX01

Modelica.Electrical.Digital.Converters

Conversion to X01

LogicToX01Z

Modelica.Electrical.Digital.Converters

Conversion to X01Z

LogicToUX01

Modelica.Electrical.Digital.Converters

Conversion to UX01

BooleanToLogic

Modelica.Electrical.Digital.Converters

Boolean to Logic converter

RealToLogic

Modelica.Electrical.Digital.Converters

Real to Logic converter

LogicToXO1

Modelica.Electrical.Digital.Converters

This model will be removed in future Modelica versions, use 'LogicToX01' instead!

LogicToXO1Z

Modelica.Electrical.Digital.Converters

This model will be removed in future Modelica versions, use 'LogicToX01Z' instead!

DFFR

Modelica.Electrical.Digital.Registers

Edge triggered register bank with reset

DFFREG

Modelica.Electrical.Digital.Registers

Edge triggered register bank with high active reset

DFFSR

Modelica.Electrical.Digital.Registers

Edge triggered register bank with set and reset

DFFREGSRH

Modelica.Electrical.Digital.Registers

Edge triggered register bank with high active set and reset

DLATR

Modelica.Electrical.Digital.Registers

Level sensitive register bank with reset

DLATREG

Modelica.Electrical.Digital.Registers

Level sensitive register bank with reset active high

DLATSR

Modelica.Electrical.Digital.Registers

Level sensitive register bank with set and reset

DLATREGSRH

Modelica.Electrical.Digital.Registers

Level sensitive register bank with set and reset, active high

NXFERGATE

Modelica.Electrical.Digital.Tristates

Transfergate with enable active high

NRXFERGATE

Modelica.Electrical.Digital.Tristates

Transfergate with enable active high. Output strength reduced.

PXFERGATE

Modelica.Electrical.Digital.Tristates

Transfergate with enable active low

PRXFERGATE

Modelica.Electrical.Digital.Tristates

Transfergate with enable active low. Output strength reduced.

BUF3S

Modelica.Electrical.Digital.Tristates

Tristate buffer with enable active high

BUF3SL

Modelica.Electrical.Digital.Tristates

Tristate buffer with enable active low

INV3S

Modelica.Electrical.Digital.Tristates

Tristate Inverter with enable active high

INV3SL

Modelica.Electrical.Digital.Tristates

Tristate inverter with enable active low

MUX2x1

Modelica.Electrical.Digital.Multiplexers

A two inputs MULTIPLEXER for multiple value logic (2 data inputs, 1 select input, 1 output)