WOLFRAM SYSTEM MODELER

SampleVectorizedAndClocked

Example of a SampleVectorizedAndClocked block for Integer signals

Diagram

Wolfram Language

In[1]:=
SystemModel["Modelica_Synchronous.Examples.Elementary.IntegerSignals.SampleVectorizedAndClocked"]
Out[1]:=

Information

Elementary example for the documentation of block Modelica_Synchronous.IntegerSignals.Sampler.SampleVectorizedAndClocked.

Components (4)

step2

Type: IntegerStep

Description: Generate step signal of type Integer
sample

Type: SampleVectorizedAndClocked

Description: Sample the continuous-time, Integer input signal vector and provide it as clocked output signal vector. The clock is provided as input signal
periodicClock

Type: PeriodicExactClock

Description: Generates a periodic clock signal with a period defined by an Integer number with resolution
step1

Type: IntegerStep

Description: Generate step signal of type Integer