WOLFRAM SYSTEM MODELER

SampleVectorizedAndClocked

Sample the continuous-time, Integer input signal vector and provide it as clocked output signal vector. The clock is provided as input signal

Wolfram Language

In[1]:=
SystemModel["Modelica_Synchronous.IntegerSignals.Sampler.SampleVectorizedAndClocked"]
Out[1]:=

Information

This block for Integer signals works similarly as the corresponding block for Real signals (see RealSignals.Sampler.SampleVectorizedAndClocked).

Analog to the corresponding Real signal block example there exists an elementary example for this Integer block.

Parameters (1)

n

Value: 1

Type: Integer

Description: Size of input signal vector u (= size of output signal vector y)

Connectors (3)

u

Type: IntegerInput[n]

Description: Connector of continuous-time, Integer input signal vector

y

Type: IntegerOutput[n]

Description: Connector of clocked, Integer output signal vector

clock

Type: ClockInput

Description: Output signal vector y is associated with this clock input

Used in Examples (2)

SampleVectorizedAndClocked

Modelica_Synchronous.Examples.Elementary.IntegerSignals

Example of a SampleVectorizedAndClocked block for Integer signals

TestIntegerSamplerAndHolds

Modelica_Synchronous.WorkInProgress.Tests