WOLFRAM SYSTEM MODELER
AssignClockVectorizedExample of a AssignClockVectorized block for Real signals |
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Diagram
Wolfram Language
In[1]:=
SystemModel["Modelica_Synchronous.Examples.Elementary.RealSignals.AssignClockVectorized"]
Out[1]:=
Information
Example used to generate a figure for the documentation of block Modelica_Synchronous.RealSignals.Sampler.AssignClockVectorized.
Components (8)
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periodicClock |
Type: PeriodicExactClock Description: Generates a periodic clock signal with a period defined by an Integer number with resolution |
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unitDelay1 |
Type: UnitDelay Description: Delays the clocked input signal for one sample period |
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add |
Type: Add Description: Output the sum of the two inputs |
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const |
Type: Constant Description: Generate constant signal of type Real |
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assignClock1 |
Type: AssignClockVectorized Description: Assigns a clock to a clocked Real signal vector |
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add1 |
Type: Add Description: Output the sum of the two inputs |
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const1 |
Type: Constant Description: Generate constant signal of type Real |
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unitDelay2 |
Type: UnitDelay Description: Delays the clocked input signal for one sample period |