WOLFRAM SYSTEM MODELER

TestCommunicationDelay

Diagram

Wolfram Language

In[1]:=
SystemModel["Modelica_Synchronous.WorkInProgress.Tests.TestCommunicationDelay"]
Out[1]:=

Components (5)

sine

Type: Sine

Description: Generate sine signal

periodicRealClock

Type: PeriodicRealClock

Description: Generates a periodic clock signal with a period defined by a Real number

sample1

Type: SampleWithADeffects

Description: Sample with (simulated) Analog-Digital converter effects including noise

assignClock1

Type: AssignClock

Description: Assigns a clock to a clocked Real signal

fixedDelay

Type: FractionalDelay

Description: Delays the clocked input signal for a fractional multiple of the sample period