WOLFRAM SYSTEM MODELER
TestExactClockWithIntegrator |
Diagram
Wolfram Language
In[1]:=
SystemModel["Modelica_Synchronous.WorkInProgress.Tests.TestExactClockWithIntegrator"]
Out[1]:=
Components (4)
 |
firstOrder |
Type: FirstOrder Description: First order transfer function block (= 1 pole) |
|---|---|---|
 |
sine |
Type: Sine Description: Generate sine signal |
 |
sample1 |
Type: SampleClocked Description: Sample the continuous-time, Real input signal and provide it as clocked output signal. The clock is provided as input signal |
 |
periodicExactClock |
Type: PeriodicExactClock Description: Generates a periodic clock signal with a period defined by an Integer number with resolution |