WOLFRAM SYSTEM MODELER

SampleClocked

Sample the continuous-time, Real input signal and provide it as clocked output signal. The clock is provided as input signal

Wolfram Language

In[1]:=
SystemModel["Modelica_Synchronous.RealSignals.Sampler.SampleClocked"]
Out[1]:=

Information

This block is similar to the Sample block. The only difference is that a clock signal is provided via a second input and the output is associated to this clock.

Note, it does not make much sense to vectorize this block, because then also the clock input is vectorized. Instead, if the input signal is a vector, use block SampleVectorizedAndClocked that has a vector Real input and output, as well as a scalar clock input.

Example

The following example samples a sine signal with a periodic clock of 20 ms period:

   
model simulation result

Connectors (3)

u

Type: RealInput

Description: Connector of continuous-time, Real input signal

y

Type: RealOutput

Description: Connector of clocked, Real output signal

clock

Type: ClockInput

Description: Output signal y is associated with this clock input

Used in Examples (46)

ClockedWithDiscreteTextbookController

Modelica_Synchronous.Examples.SimpleControlledDrive

Simple controlled drive with discrete textbook controller (period is not used in the controller)

ClockedWithDiscreteController

Modelica_Synchronous.Examples.SimpleControlledDrive

Simple controlled drive with discrete controller (period is used in the controller)

ExactlyClockedWithDiscreteController

Modelica_Synchronous.Examples.SimpleControlledDrive

Simple controlled drive with discrete controller and exact periodic clocks (period is used in the controller)

ClockedWithDiscretizedContinuousController

Modelica_Synchronous.Examples.SimpleControlledDrive

Simple controlled drive with discretized continuous-time controller

SubClocked

Modelica_Synchronous.Examples.CascadeControlledDrive

Drive with clocked cascade controller where clocks are defined with sub-sampling and partitions with super-sampling

SuperSampled

Modelica_Synchronous.Examples.CascadeControlledDrive

Drive with clocked cascade controller where fastest partition is defined with a clock and slower partition is defined with super-sampling

AbsoluteClocks

Modelica_Synchronous.Examples.CascadeControlledDrive

Drive with clocked cascade controller where all partitions are defined with exact (integer) clock that need to be compatible to each other

ControlledMixingUnit

Modelica_Synchronous.Examples.Systems

Simple example of a mixing unit where a (discretized) nonlinear inverse plant model is used as feedforward controller

EngineThrottleControl

Modelica_Synchronous.Examples.Systems

SubSample

Modelica_Synchronous.Examples.Elementary.ClockSignals

Example of a SubSample block for Clock signals

SuperSample

Modelica_Synchronous.Examples.Elementary.ClockSignals

Example of a SuperSample block for Clock signals

ShiftSample

Modelica_Synchronous.Examples.Elementary.ClockSignals

Example of a ShiftSample block for Clock signals

RotationalSample

Modelica_Synchronous.Examples.Elementary.ClockSignals

Simple example of a rotational clock with variable trigger interval and switching rotation-direction.

Sample3

Modelica_Synchronous.Examples.Elementary.RealSignals

Example of a Sample block for Real signals with direct feed-through in the continuous-time and the clocked partition

SampleClocked

Modelica_Synchronous.Examples.Elementary.RealSignals

Example of a SampleClocked block for Real signals

Hold

Modelica_Synchronous.Examples.Elementary.RealSignals

Example of a Hold block for Real signals

HoldWithDAeffects1

Modelica_Synchronous.Examples.Elementary.RealSignals

Example of a HoldWithDAeffects block for Real signals

HoldWithDAeffects2

Modelica_Synchronous.Examples.Elementary.RealSignals

Example of a HoldWithDAeffects block for Real signals (with a computational delay of one sample period)

SubSample

Modelica_Synchronous.Examples.Elementary.RealSignals

Example of a SubSample block for Real signals

SuperSample

Modelica_Synchronous.Examples.Elementary.RealSignals

Example of a SuperSample block for Real signals

SuperSampleInterpolated

Modelica_Synchronous.Examples.Elementary.RealSignals

Example of a SuperSampleInterpolated block for Real signals

ShiftSample

Modelica_Synchronous.Examples.Elementary.RealSignals

Example of a ShiftSample block for Real signals

BackSample

Modelica_Synchronous.Examples.Elementary.RealSignals

Example of a BackSample block for Real signals

UpSample1

Modelica_Synchronous.Examples.Elementary.RealSignals

Example of an UpSample block for Real signals

UpSample2

Modelica_Synchronous.Examples.Elementary.RealSignals

Example of an UpSample block for Real signals combined with FIR filter blocks

AssignClockToTriggerHold

Modelica_Synchronous.Examples.Elementary.RealSignals

Example of an AssignClockToTriggerHold block for Real signals

AssignClockToSquareWaveHold

Modelica_Synchronous.Examples.Elementary.RealSignals

Example of an AssignClockToSquareWaveHold block for Real signals

UniformNoise

Modelica_Synchronous.Examples.Elementary.RealSignals

Example of a UniformNoise block for Real signals

FractionalDelay

Modelica_Synchronous.Examples.Elementary.RealSignals

Example of a FractionalDelay block for Real signals

TestFIR_1

Modelica_Synchronous.WorkInProgress.Tests

TestFIR

Modelica_Synchronous.WorkInProgress.Tests

TestFIR_Step

Modelica_Synchronous.WorkInProgress.Tests

TestFIR_Step2

Modelica_Synchronous.WorkInProgress.Tests

TestFIR_Step2b

Modelica_Synchronous.WorkInProgress.Tests

TestInterpolator

Modelica_Synchronous.WorkInProgress.Tests

TestUnitDelay

Modelica_Synchronous.WorkInProgress.Tests

TestTransferFunction

Modelica_Synchronous.WorkInProgress.Tests

TestStateSpace

Modelica_Synchronous.WorkInProgress.Tests

TestShiftSample

Modelica_Synchronous.WorkInProgress.Tests

TestClockedRealToTrigger

Modelica_Synchronous.WorkInProgress.Tests

TestBackSample

Modelica_Synchronous.WorkInProgress.Tests

TestClockedRealToSquare

Modelica_Synchronous.WorkInProgress.Tests

TestEventClockWithIntegrator

Modelica_Synchronous.WorkInProgress.Tests

TestExactClockWithIntegrator

Modelica_Synchronous.WorkInProgress.Tests

TestExactClockWithSolver

Modelica_Synchronous.WorkInProgress.Tests

SuperSampling

Modelica_Synchronous.WorkInProgress.Tests.Effects

Different ways to super sample a signal

Used in Components (2)

RotationalClock

Modelica_Synchronous.ClockSignals.Clocks.Rotational

Event clock generating a clock tick each time an observed input angle changed for a rotational-interval given as variable input.

TestPIDController

Modelica_Synchronous.WorkInProgress.Incubate