Wolfram Language

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SystemModel["Modelica_Synchronous.WorkInProgress.Tests.TestUnitDelay"]

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Components (4)

	sine	Type: Sine Description: Generate sine signal
	sample1	Type: SampleClocked Description: Sample the continuous-time, Real input signal and provide it as clocked output signal. The clock is provided as input signal
	periodicRealClock	Type: PeriodicRealClock Description: Generates a periodic clock signal with a period defined by a Real number
	UnitDelay1	Type: UnitDelay Description: Delays the clocked input signal for one sample period