WOLFRAM SYSTEM MODELER

TestInterpolator

Diagram

Wolfram Language

In[1]:=
SystemModel["Modelica_Synchronous.WorkInProgress.Tests.TestInterpolator"]
Out[1]:=

Components (7)

sine

Type: Sine

Description: Generate sine signal

sample1

Type: SampleClocked

Description: Sample the continuous-time, Real input signal and provide it as clocked output signal. The clock is provided as input signal

periodicRealClock

Type: PeriodicRealClock

Description: Generates a periodic clock signal with a period defined by a Real number

assignClock1

Type: AssignClock

Description: Assigns a clock to a clocked Real signal

superSample1

Type: SuperSample

Description: Super-sample the input clock and provide it as output clock

interpolator1

Type: Interpolator

Description: Super-sample the clocked Real input signal and provide it linearly interpolated and optionally filterd as clocked output signal

interpolator2

Type: Interpolator

Description: Super-sample the clocked Real input signal and provide it linearly interpolated and optionally filterd as clocked output signal