WOLFRAM SYSTEM MODELER
SuperSampleSuper-sample the clocked Real input signal and provide it as clocked output signal |
SystemModel["Modelica_Synchronous.RealSignals.Sampler.SuperSample"]
This block super-samples the clocked Real input signal u and provides it as clocked output signal y.
To be more precise: The clock of y is factor-times faster than the clock of u. At every tick of the clock of y, the value of y is set to the value of u from the last tick of the clock of u. The first activation of the clock of y coincides with the first activation of the clock of u. By default, the super-sampling factor is inferred, that is, it must be defined somewhere else. If parameter inferFactor = false, then the super-sampling factor is defined by Integer parameter factor.
For control applications this block introduces unnecessary "vibrations". In such a case it is better to use block SuperSampleInterpolated instead.
The following
example
samples a sine signal with a periodic clock of 20 ms period, and
then super-samples the resulting clocked signal with a factor of 3:
model | simulation result |
As can be seen, superSample introduces factor-1 additional clock ticks for the output y. The super-sampling factor = 3 is displayed in the icon of the superSample block. Note the up-arrow in the icon of the superSample block indicates that the clock of superSample.y is faster as the clock of superSample.u.
inferFactor |
Value: true Type: Boolean Description: = true, if super-sampling factor is inferred |
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factor |
Value: 1 Type: Integer Description: Super-sampling factor >= 1 (ignored if inferFactor=true) |
u |
Type: RealInput Description: Connector of clocked, Real input signal |
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y |
Type: RealOutput Description: Connector of clocked, Real output signal (clock of y is faster as clock of u) |
Modelica_Synchronous.Examples.CascadeControlledDrive Drive with clocked cascade controller where clocks are defined with sub-sampling and partitions with super-sampling |
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Modelica_Synchronous.Examples.CascadeControlledDrive Drive with clocked cascade controller where fastest partition is defined with a clock and slower partition is defined with super-sampling |
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Modelica_Synchronous.Examples.CascadeControlledDrive Drive with clocked cascade controller where all partitions are defined with exact (integer) clock that need to be compatible to each other |
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Modelica_Synchronous.Examples.Elementary.RealSignals Example of a SuperSample block for Real signals |
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Modelica_Synchronous.WorkInProgress.Tests.Effects Different ways to super sample a signal |