WOLFRAM SYSTEM MODELER

Logic

Logic values and their coding according to IEEE 1164 STD_ULOGIC type

Wolfram Language

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SystemModel["Modelica.Electrical.Digital.Interfaces.Logic"]
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Information

This information is part of the Modelica Standard Library maintained by the Modelica Association.

Code Table:

Logic value Meaning
'U' Uninitialized
'X' Forcing Unknown
'0' Forcing 0
'1' Forcing 1
'Z' High Impedance
'W' Weak Unknown
'L' Weak 0
'H' Weak 1
'-' Do not care

Enumeration Literals (9)

'U'

U Uninitialized

'X'

X Forcing Unknown

'0'

0 Forcing 0

'1'

1 Forcing 1

'Z'

Z High Impedance

'W'

W Weak Unknown

'L'

L Weak 0

'H'

H Weak 1

'-'

- Do not care

Used in Components (33)

MUX4

Modelica.Electrical.Digital.Examples.Utilities

4 to 1 Bit Multiplexer

RS

Modelica.Electrical.Digital.Examples.Utilities

Unclocked RS FlipFlop

RSFF

Modelica.Electrical.Digital.Examples.Utilities

Unclocked RS FlipFlop

JKFF

Modelica.Electrical.Digital.Examples.Utilities

JK FlipFlop

Counter

Modelica.Electrical.Digital.Examples.Utilities

Generic N Bit Counter

TransportDelay

Modelica.Electrical.Digital.Delay

Transport delay with initial parameter

InertialDelay

Modelica.Electrical.Digital.Delay

Inertial delay with initial parameter

InertialDelaySensitive

Modelica.Electrical.Digital.Delay

Provide the input as output if it holds its value for a specific amount of time

Not

Modelica.Electrical.Digital.Basic

Not logic component without delay

And

Modelica.Electrical.Digital.Basic

And logic component with multiple input and one output

Nand

Modelica.Electrical.Digital.Basic

Nand logic component with multiple input and one output

Or

Modelica.Electrical.Digital.Basic

Or logic component with multiple input and one output

Nor

Modelica.Electrical.Digital.Basic

Nor logic component with multiple input and one output

Xor

Modelica.Electrical.Digital.Basic

Xor logic component with multiple input and one output

Xnor

Modelica.Electrical.Digital.Basic

Xnor logic component with multiple input and one output

Set

Modelica.Electrical.Digital.Sources

Digital Set Source

Step

Modelica.Electrical.Digital.Sources

Digital Step Source

Table

Modelica.Electrical.Digital.Sources

Digital Tabular Source

Pulse

Modelica.Electrical.Digital.Sources

Digital Pulse Source

DFFR

Modelica.Electrical.Digital.Registers

Edge triggered register bank with reset

DFFSR

Modelica.Electrical.Digital.Registers

Edge triggered register bank with set and reset

DLATR

Modelica.Electrical.Digital.Registers

Level sensitive register bank with reset

DLATSR

Modelica.Electrical.Digital.Registers

Level sensitive register bank with set and reset

NXFERGATE

Modelica.Electrical.Digital.Tristates

Transfergate with enable active high

NRXFERGATE

Modelica.Electrical.Digital.Tristates

Transfergate with enable active high. Output strength reduced.

PXFERGATE

Modelica.Electrical.Digital.Tristates

Transfergate with enable active low

PRXFERGATE

Modelica.Electrical.Digital.Tristates

Transfergate with enable active low. Output strength reduced.

BUF3S

Modelica.Electrical.Digital.Tristates

Tristate buffer with enable active high

BUF3SL

Modelica.Electrical.Digital.Tristates

Tristate buffer with enable active low

INV3S

Modelica.Electrical.Digital.Tristates

Tristate Inverter with enable active high

INV3SL

Modelica.Electrical.Digital.Tristates

Tristate inverter with enable active low

WiredX

Modelica.Electrical.Digital.Tristates

Wired node with multiple input and one output

MUX2x1

Modelica.Electrical.Digital.Multiplexers

A two inputs MULTIPLEXER for multiple value logic (2 data inputs, 1 select input, 1 output)

Extended by (1)

DigitalSignal

Modelica.Electrical.Digital.Interfaces

Digital port (both input/output possible)